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IEEE 1076.1-2017

$159.17

IEEE Standard VHDL Analog and Mixed-Signal Extensions

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IEEE 2017
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Revision Standard – Active. The IEEE 1076.1 language, a hardware description language for the description and the simulation of analog, digital, and mixed-signal systems, is defined in this standard. The language, also informally known as VHDL-AMS, is built on IEEE Std 1076-2008 (VHDL) and extends it with additions and changes to provide capabilities of writing and simulating analog and mixed-signal models. (Additional downloadable files are available for this standard at http://standards.ieee.org/downloads/1076/1076.1-2017/)

IEEE 1076.1-2017
$159.17