{"id":444868,"date":"2024-10-20T08:39:21","date_gmt":"2024-10-20T08:39:21","guid":{"rendered":"https:\/\/pdfstandards.shop\/product\/uncategorized\/ieee-1658-2023\/"},"modified":"2024-10-26T16:07:25","modified_gmt":"2024-10-26T16:07:25","slug":"ieee-1658-2023","status":"publish","type":"product","link":"https:\/\/pdfstandards.shop\/product\/publishers\/ieee\/ieee-1658-2023\/","title":{"rendered":"IEEE 1658-2023"},"content":{"rendered":"

Revision Standard – Active. Terminology and test methods to clearly document prevalent world-wide terms used to describe and test digital-to-analog converters (DACs) are provided. It is restricted to monolithic, hybrid, and module DACs and does not cover systems encompassing DACs.<\/p>\n

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PDF Pages<\/th>\nPDF Title<\/th>\n<\/tr>\n
1<\/td>\nIEEE Std 1658\u2122-2023 Front cover <\/td>\n<\/tr>\n
2<\/td>\nTitle page <\/td>\n<\/tr>\n
4<\/td>\nImportant Notices and Disclaimers Concerning IEEE Standards Documents <\/td>\n<\/tr>\n
8<\/td>\nParticipants
Introduction <\/td>\n<\/tr>\n
11<\/td>\nContents <\/td>\n<\/tr>\n
13<\/td>\nList of Figures <\/td>\n<\/tr>\n
15<\/td>\nList of Tables <\/td>\n<\/tr>\n
16<\/td>\n1.\u2002Overview
1.1\u2002Scope
1.2\u2002Purpose
1.3\u2002Word usage <\/td>\n<\/tr>\n
17<\/td>\n1.4\u2002Discussion of scope and purpose
1.5\u2002Digital-to-analog converter and analog-to-digital converter differences and similarities <\/td>\n<\/tr>\n
19<\/td>\n1.6\u2002Digital-to-analog converter background <\/td>\n<\/tr>\n
26<\/td>\n1.7\u2002Guidance to the user <\/td>\n<\/tr>\n
30<\/td>\n1.8\u2002Manufacturer supplied information <\/td>\n<\/tr>\n
32<\/td>\n2.\u2002Normative references <\/td>\n<\/tr>\n
33<\/td>\n3.\u2002Definitions, symbols, acronyms, and abbreviations
3.1\u2002Definitions <\/td>\n<\/tr>\n
41<\/td>\n3.2\u2002Symbols <\/td>\n<\/tr>\n
43<\/td>\n3.3\u2002Acronyms and abbreviations <\/td>\n<\/tr>\n
44<\/td>\n4.\u2002Test methods
4.1\u2002General comments on test methods
4.2\u2002Test setup <\/td>\n<\/tr>\n
45<\/td>\n4.3\u2002Static testing <\/td>\n<\/tr>\n
46<\/td>\n4.4\u2002Dynamic testing <\/td>\n<\/tr>\n
48<\/td>\n4.5\u2002Taking a waveform <\/td>\n<\/tr>\n
49<\/td>\n5.\u2002Fitting sine waves
5.1\u2002Curve fitting test method <\/td>\n<\/tr>\n
50<\/td>\n5.2\u2002Choice of frequencies and waveform epoch
5.3\u2002Fine-scale frequency selection
5.4\u2002Medium-scale frequency selection
5.5\u2002Coarse-scale frequency selection <\/td>\n<\/tr>\n
51<\/td>\n5.6\u2002Selecting signal amplitudes
6.\u2002Digital input
6.1\u2002Coding
6.2\u2002Clock and data feedthrough <\/td>\n<\/tr>\n
52<\/td>\n6.3\u2002Static input parameters <\/td>\n<\/tr>\n
53<\/td>\n6.4\u2002Timing parameters
7.\u2002Analog inputs
7.1\u2002Comments on analog inputs <\/td>\n<\/tr>\n
54<\/td>\n8.\u2002Analog output (single-ended and differential)
8.1\u2002Figure\u00a021\u2014Block diagram of DAC topologies
8.2\u2002Output impedance <\/td>\n<\/tr>\n
55<\/td>\n8.3\u2002Short-circuit current <\/td>\n<\/tr>\n
56<\/td>\n8.4\u2002Compliance voltage for current-output DACs
8.5\u2002Load current for voltage-output DACs <\/td>\n<\/tr>\n
57<\/td>\n8.6\u2002Maximum usable dynamic range
9.\u2002Gain and offset (static and dynamic)
9.1\u2002Static gain and offset (independently based) <\/td>\n<\/tr>\n
58<\/td>\n9.2\u2002Static gain and offset (terminally based) <\/td>\n<\/tr>\n
59<\/td>\n9.3\u2002Dynamic gain and offset
10.\u2002G(f) is the dynamic gain of the DAC at frequency f.Linearity (static and dynamic)
10.1\u2002Integral nonlinearity <\/td>\n<\/tr>\n
60<\/td>\n10.2\u2002Differential nonlinearity
10.3\u2002Monotonicity
10.4\u2002Spurious free dynamic range (SFDR) <\/td>\n<\/tr>\n
63<\/td>\n11.\u2002Noise <\/td>\n<\/tr>\n
64<\/td>\n11.1\u2002Signal-to-noise and distortion ratio <\/td>\n<\/tr>\n
68<\/td>\n11.2\u2002Signal-to-noise ratio <\/td>\n<\/tr>\n
69<\/td>\n11.3\u20021\/f Noise <\/td>\n<\/tr>\n
70<\/td>\n11.4\u2002Effective number of bits <\/td>\n<\/tr>\n
72<\/td>\n11.5\u2002Noise power ratio
12.\u2002Harmonic and spurious distortion
12.1\u2002Total harmonic distortion <\/td>\n<\/tr>\n
74<\/td>\n12.2\u2002Intermodulation distortion
12.3\u2002Glitches <\/td>\n<\/tr>\n
77<\/td>\n13.\u2002Step response parameters
13.1\u2002General comments on step response parameters
13.2\u2002Test method for acquiring an estimate of the step response <\/td>\n<\/tr>\n
78<\/td>\n13.3\u2002Slew rate limit
13.4\u2002Settling time parameters <\/td>\n<\/tr>\n
81<\/td>\n13.5\u2002Transition duration <\/td>\n<\/tr>\n
82<\/td>\n13.6\u2002Overshoot and precursors
14.\u2002Interference-related DAC parameters
14.1\u2002Multitone power ratio <\/td>\n<\/tr>\n
83<\/td>\n14.2\u2002Crosstalk (channel separation, channel isolation) <\/td>\n<\/tr>\n
86<\/td>\n14.3\u2002Channel matching
14.4\u2002Channel skew <\/td>\n<\/tr>\n
87<\/td>\n15.\u2002Frequency response parameters
15.1\u2002General comments on frequency response parameters <\/td>\n<\/tr>\n
88<\/td>\n15.2\u2002Reference input bandwidth <\/td>\n<\/tr>\n
89<\/td>\n15.3\u2002Digital-to-analog-conversion frequency response <\/td>\n<\/tr>\n
94<\/td>\n16.\u2002Power supply parameters
16.1\u2002Power supply currents
16.2\u2002Power supply voltage effects <\/td>\n<\/tr>\n
96<\/td>\n16.3\u2002Ground currents <\/td>\n<\/tr>\n
98<\/td>\nAnnex\u00a0A (informative) DAC architectures
A.1\u2002Binary weighted <\/td>\n<\/tr>\n
100<\/td>\nA.2\u2002Segmented
A.3\u2002R-2R <\/td>\n<\/tr>\n
101<\/td>\nA.4\u2002Delta-Sigma <\/td>\n<\/tr>\n
102<\/td>\nA.5\u2002PWM DAC <\/td>\n<\/tr>\n
103<\/td>\nA.6\u2002Multiple DAC architecture <\/td>\n<\/tr>\n
104<\/td>\nAnnex\u00a0B (informative) Sine-wave fitting algorithms
B.1\u2002An algorithm for three-parameter (known frequency) least-squares fit to sine wave data using matrix operations <\/td>\n<\/tr>\n
105<\/td>\nB.2\u2002An algorithm for four-parameter (general use) least-squares fit to sine-wave data using matrix operations <\/td>\n<\/tr>\n
108<\/td>\nAnnex\u00a0C (informative) Discrete Fourier transforms and windowing
C.1\u2002Discrete Fourier transforms and windowing <\/td>\n<\/tr>\n
109<\/td>\nC.2\u2002Windowed DFT
C.3\u2002Spectral averaging <\/td>\n<\/tr>\n
110<\/td>\nC.4\u2002Spectral leakage
C.5\u2002Coherent sampling, sine fitting, and other means of dealing with spectral leakage <\/td>\n<\/tr>\n
111<\/td>\nC.6\u2002Useful windows and their characteristics <\/td>\n<\/tr>\n
112<\/td>\nA.1\u2002Choosing a window <\/td>\n<\/tr>\n
113<\/td>\nAnnex\u00a0D (informative) Bibliography <\/td>\n<\/tr>\n
115<\/td>\nBack cover <\/td>\n<\/tr>\n<\/table>\n","protected":false},"excerpt":{"rendered":"

IEEE Standard for Terminology and Test Methods of Digital-to-Analog Converter Devices (Published)<\/b><\/p>\n\n\n\n\n
Published By<\/td>\nPublication Date<\/td>\nNumber of Pages<\/td>\n<\/tr>\n
IEEE<\/b><\/a><\/td>\n2023<\/td>\n<\/td>\n<\/tr>\n<\/tbody>\n<\/table>\n","protected":false},"featured_media":444878,"template":"","meta":{"rank_math_lock_modified_date":false,"ep_exclude_from_search":false},"product_cat":[2644],"product_tag":[],"class_list":{"0":"post-444868","1":"product","2":"type-product","3":"status-publish","4":"has-post-thumbnail","6":"product_cat-ieee","8":"first","9":"instock","10":"sold-individually","11":"shipping-taxable","12":"purchasable","13":"product-type-simple"},"_links":{"self":[{"href":"https:\/\/pdfstandards.shop\/wp-json\/wp\/v2\/product\/444868","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/pdfstandards.shop\/wp-json\/wp\/v2\/product"}],"about":[{"href":"https:\/\/pdfstandards.shop\/wp-json\/wp\/v2\/types\/product"}],"wp:featuredmedia":[{"embeddable":true,"href":"https:\/\/pdfstandards.shop\/wp-json\/wp\/v2\/media\/444878"}],"wp:attachment":[{"href":"https:\/\/pdfstandards.shop\/wp-json\/wp\/v2\/media?parent=444868"}],"wp:term":[{"taxonomy":"product_cat","embeddable":true,"href":"https:\/\/pdfstandards.shop\/wp-json\/wp\/v2\/product_cat?post=444868"},{"taxonomy":"product_tag","embeddable":true,"href":"https:\/\/pdfstandards.shop\/wp-json\/wp\/v2\/product_tag?post=444868"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}