{"id":444868,"date":"2024-10-20T08:39:21","date_gmt":"2024-10-20T08:39:21","guid":{"rendered":"https:\/\/pdfstandards.shop\/product\/uncategorized\/ieee-1658-2023\/"},"modified":"2024-10-26T16:07:25","modified_gmt":"2024-10-26T16:07:25","slug":"ieee-1658-2023","status":"publish","type":"product","link":"https:\/\/pdfstandards.shop\/product\/publishers\/ieee\/ieee-1658-2023\/","title":{"rendered":"IEEE 1658-2023"},"content":{"rendered":"
Revision Standard – Active. Terminology and test methods to clearly document prevalent world-wide terms used to describe and test digital-to-analog converters (DACs) are provided. It is restricted to monolithic, hybrid, and module DACs and does not cover systems encompassing DACs.<\/p>\n
PDF Pages<\/th>\n | PDF Title<\/th>\n<\/tr>\n | ||||||
---|---|---|---|---|---|---|---|
1<\/td>\n | IEEE Std 1658\u2122-2023 Front cover <\/td>\n<\/tr>\n | ||||||
2<\/td>\n | Title page <\/td>\n<\/tr>\n | ||||||
4<\/td>\n | Important Notices and Disclaimers Concerning IEEE Standards Documents <\/td>\n<\/tr>\n | ||||||
8<\/td>\n | Participants Introduction <\/td>\n<\/tr>\n | ||||||
11<\/td>\n | Contents <\/td>\n<\/tr>\n | ||||||
13<\/td>\n | List of Figures <\/td>\n<\/tr>\n | ||||||
15<\/td>\n | List of Tables <\/td>\n<\/tr>\n | ||||||
16<\/td>\n | 1.\u2002Overview 1.1\u2002Scope 1.2\u2002Purpose 1.3\u2002Word usage <\/td>\n<\/tr>\n | ||||||
17<\/td>\n | 1.4\u2002Discussion of scope and purpose 1.5\u2002Digital-to-analog converter and analog-to-digital converter differences and similarities <\/td>\n<\/tr>\n | ||||||
19<\/td>\n | 1.6\u2002Digital-to-analog converter background <\/td>\n<\/tr>\n | ||||||
26<\/td>\n | 1.7\u2002Guidance to the user <\/td>\n<\/tr>\n | ||||||
30<\/td>\n | 1.8\u2002Manufacturer supplied information <\/td>\n<\/tr>\n | ||||||
32<\/td>\n | 2.\u2002Normative references <\/td>\n<\/tr>\n | ||||||
33<\/td>\n | 3.\u2002Definitions, symbols, acronyms, and abbreviations 3.1\u2002Definitions <\/td>\n<\/tr>\n | ||||||
41<\/td>\n | 3.2\u2002Symbols <\/td>\n<\/tr>\n | ||||||
43<\/td>\n | 3.3\u2002Acronyms and abbreviations <\/td>\n<\/tr>\n | ||||||
44<\/td>\n | 4.\u2002Test methods 4.1\u2002General comments on test methods 4.2\u2002Test setup <\/td>\n<\/tr>\n | ||||||
45<\/td>\n | 4.3\u2002Static testing <\/td>\n<\/tr>\n | ||||||
46<\/td>\n | 4.4\u2002Dynamic testing <\/td>\n<\/tr>\n | ||||||
48<\/td>\n | 4.5\u2002Taking a waveform <\/td>\n<\/tr>\n | ||||||
49<\/td>\n | 5.\u2002Fitting sine waves 5.1\u2002Curve fitting test method <\/td>\n<\/tr>\n | ||||||
50<\/td>\n | 5.2\u2002Choice of frequencies and waveform epoch 5.3\u2002Fine-scale frequency selection 5.4\u2002Medium-scale frequency selection 5.5\u2002Coarse-scale frequency selection <\/td>\n<\/tr>\n | ||||||
51<\/td>\n | 5.6\u2002Selecting signal amplitudes 6.\u2002Digital input 6.1\u2002Coding 6.2\u2002Clock and data feedthrough <\/td>\n<\/tr>\n | ||||||
52<\/td>\n | 6.3\u2002Static input parameters <\/td>\n<\/tr>\n | ||||||
53<\/td>\n | 6.4\u2002Timing parameters 7.\u2002Analog inputs 7.1\u2002Comments on analog inputs <\/td>\n<\/tr>\n | ||||||
54<\/td>\n | 8.\u2002Analog output (single-ended and differential) 8.1\u2002Figure\u00a021\u2014Block diagram of DAC topologies 8.2\u2002Output impedance <\/td>\n<\/tr>\n | ||||||
55<\/td>\n | 8.3\u2002Short-circuit current <\/td>\n<\/tr>\n | ||||||
56<\/td>\n | 8.4\u2002Compliance voltage for current-output DACs 8.5\u2002Load current for voltage-output DACs <\/td>\n<\/tr>\n | ||||||
57<\/td>\n | 8.6\u2002Maximum usable dynamic range 9.\u2002Gain and offset (static and dynamic) 9.1\u2002Static gain and offset (independently based) <\/td>\n<\/tr>\n | ||||||
58<\/td>\n | 9.2\u2002Static gain and offset (terminally based) <\/td>\n<\/tr>\n | ||||||
59<\/td>\n | 9.3\u2002Dynamic gain and offset 10.\u2002G(f) is the dynamic gain of the DAC at frequency f.Linearity (static and dynamic) 10.1\u2002Integral nonlinearity <\/td>\n<\/tr>\n | ||||||
60<\/td>\n | 10.2\u2002Differential nonlinearity 10.3\u2002Monotonicity 10.4\u2002Spurious free dynamic range (SFDR) <\/td>\n<\/tr>\n | ||||||
63<\/td>\n | 11.\u2002Noise <\/td>\n<\/tr>\n | ||||||
64<\/td>\n | 11.1\u2002Signal-to-noise and distortion ratio <\/td>\n<\/tr>\n | ||||||
68<\/td>\n | 11.2\u2002Signal-to-noise ratio <\/td>\n<\/tr>\n | ||||||
69<\/td>\n | 11.3\u20021\/f Noise <\/td>\n<\/tr>\n | ||||||
70<\/td>\n | 11.4\u2002Effective number of bits <\/td>\n<\/tr>\n | ||||||
72<\/td>\n | 11.5\u2002Noise power ratio 12.\u2002Harmonic and spurious distortion 12.1\u2002Total harmonic distortion <\/td>\n<\/tr>\n | ||||||
74<\/td>\n | 12.2\u2002Intermodulation distortion 12.3\u2002Glitches <\/td>\n<\/tr>\n | ||||||
77<\/td>\n | 13.\u2002Step response parameters 13.1\u2002General comments on step response parameters 13.2\u2002Test method for acquiring an estimate of the step response <\/td>\n<\/tr>\n | ||||||
78<\/td>\n | 13.3\u2002Slew rate limit 13.4\u2002Settling time parameters <\/td>\n<\/tr>\n | ||||||
81<\/td>\n | 13.5\u2002Transition duration <\/td>\n<\/tr>\n | ||||||
82<\/td>\n | 13.6\u2002Overshoot and precursors 14.\u2002Interference-related DAC parameters 14.1\u2002Multitone power ratio <\/td>\n<\/tr>\n | ||||||
83<\/td>\n | 14.2\u2002Crosstalk (channel separation, channel isolation) <\/td>\n<\/tr>\n | ||||||
86<\/td>\n | 14.3\u2002Channel matching 14.4\u2002Channel skew <\/td>\n<\/tr>\n | ||||||
87<\/td>\n | 15.\u2002Frequency response parameters 15.1\u2002General comments on frequency response parameters <\/td>\n<\/tr>\n | ||||||
88<\/td>\n | 15.2\u2002Reference input bandwidth <\/td>\n<\/tr>\n | ||||||
89<\/td>\n | 15.3\u2002Digital-to-analog-conversion frequency response <\/td>\n<\/tr>\n | ||||||
94<\/td>\n | 16.\u2002Power supply parameters 16.1\u2002Power supply currents 16.2\u2002Power supply voltage effects <\/td>\n<\/tr>\n | ||||||
96<\/td>\n | 16.3\u2002Ground currents <\/td>\n<\/tr>\n | ||||||
98<\/td>\n | Annex\u00a0A (informative) DAC architectures A.1\u2002Binary weighted <\/td>\n<\/tr>\n | ||||||
100<\/td>\n | A.2\u2002Segmented A.3\u2002R-2R <\/td>\n<\/tr>\n | ||||||
101<\/td>\n | A.4\u2002Delta-Sigma <\/td>\n<\/tr>\n | ||||||
102<\/td>\n | A.5\u2002PWM DAC <\/td>\n<\/tr>\n | ||||||
103<\/td>\n | A.6\u2002Multiple DAC architecture <\/td>\n<\/tr>\n | ||||||
104<\/td>\n | Annex\u00a0B (informative) Sine-wave fitting algorithms B.1\u2002An algorithm for three-parameter (known frequency) least-squares fit to sine wave data using matrix operations <\/td>\n<\/tr>\n | ||||||
105<\/td>\n | B.2\u2002An algorithm for four-parameter (general use) least-squares fit to sine-wave data using matrix operations <\/td>\n<\/tr>\n | ||||||
108<\/td>\n | Annex\u00a0C (informative) Discrete Fourier transforms and windowing C.1\u2002Discrete Fourier transforms and windowing <\/td>\n<\/tr>\n | ||||||
109<\/td>\n | C.2\u2002Windowed DFT C.3\u2002Spectral averaging <\/td>\n<\/tr>\n | ||||||
110<\/td>\n | C.4\u2002Spectral leakage C.5\u2002Coherent sampling, sine fitting, and other means of dealing with spectral leakage <\/td>\n<\/tr>\n | ||||||
111<\/td>\n | C.6\u2002Useful windows and their characteristics <\/td>\n<\/tr>\n | ||||||
112<\/td>\n | A.1\u2002Choosing a window <\/td>\n<\/tr>\n | ||||||
113<\/td>\n | Annex\u00a0D (informative) Bibliography <\/td>\n<\/tr>\n | ||||||
115<\/td>\n | Back cover <\/td>\n<\/tr>\n<\/table>\n","protected":false},"excerpt":{"rendered":" IEEE Standard for Terminology and Test Methods of Digital-to-Analog Converter Devices (Published)<\/b><\/p>\n |