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BS IEC 61523-4:2023:2024 Edition

BS IEC 61523-4:2023:2024 Edition

$215.11

Delay and power calculation standards – Design and Verification of Low-Power, Energy-Aware Electronic Systems

Published By Publication Date Number of Pages
BSI 2024 552
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PDF Catalog

PDF Pages PDF Title
2 undefined
4 Contents
17 1. Overview
1.1 Scope
1.2 Purpose
1.3 Key characteristics of the Unified Power Format
19 1.4 Contents of this standard
20 2. Normative references
3. Definitions, acronyms, and abbreviations
3.1 Definitions
26 3.2 Acronyms and abbreviations
27 4. Concepts
4.1 Introduction
28 4.2 Design structure
4.3 Design representation
32 4.4 Power architecture
35 4.5 Power distribution
43 4.6 Power management
48 4.7 Supply states and power states
55 4.8 Simstates
56 4.9 Power intent specification
62 5. Language basics
5.1 UPF is Tcl
63 5.2 Conventions used
65 5.3 Lexical elements
69 5.4 Boolean expressions
71 5.5 Object declaration
5.6 Attributes of objects
76 5.7 Precedence
79 5.8 Generic UPF command semantics
80 5.9 effective_element_list semantics
83 5.10 Command refinement
84 5.11 Error handling
5.12 Units
5.13 SystemC language basic
85 6. Power intent commands
6.1 Introduction
6.2 Categories
86 6.3 add_parameter
87 6.4 add_port_state (legacy)
88 6.5 add_power_state
95 6.6 add_pst_state (legacy)
96 6.7 add_state_transition
98 6.8 add_supply_state
99 6.9 apply_power_model
101 6.10 associate_supply_set
103 6.11 begin_power_model (legacy)
104 6.12 bind_checker
106 6.13 connect_logic_net
108 6.14 connect_supply_net
110 6.15 connect_supply_set
111 6.16 create_composite_domain
113 6.17 create_hdl2upf_vct
114 6.18 create_logic_net
115 6.19 create_logic_port
116 6.20 create_power_domain
123 6.21 create_power_state_group
125 6.22 create_power_switch
132 6.23 create_pst (legacy)
133 6.24 create_supply_net
137 6.25 create_supply_port
138 6.26 create_supply_set
140 6.27 create_upf2hdl_vct
141 6.28 define_power_model
143 6.29 describe_state_transition (deprecated)
6.30 end_power_model (legacy)
144 6.31 find_objects
148 6.32 load_simstate_behavior
149 6.33 load_upf
150 6.34 load_upf_protected (deprecated)
6.35 map_power_switch
151 6.36 map_repeater_cell
152 6.37 map_retention_cell
156 6.38 name_format
157 6.39 save_upf
158 6.40 set_correlated
159 6.41 set_design_attributes
160 6.42 set_design_top
161 6.43 set_domain_supply_net (legacy)
162 6.44 set_equivalent
164 6.45 set_isolation
171 6.46 set_level_shifter
177 6.47 set_partial_on_translation
179 6.48 set_port_attributes
185 6.49 set_repeater
189 6.50 set_retention
193 6.51 set_retention_elements
194 6.52 set_scope
195 6.53 set_simstate_behavior
198 6.54 set_variation
199 6.55 sim_assertion_control
201 6.56 sim_corruption_control
204 6.57 sim_replay_control
206 6.58 upf_version
207 6.59 use_interface_cell
209 7. Power-management cell definition commands
7.1 Introduction
210 7.2 define_always_on_cell
211 7.3 define_diode_clamp
212 7.4 define_isolation_cell
215 7.5 define_level_shifter_cell
220 7.6 define_power_switch_cell
222 7.7 define_retention_cell
224 8. UPF processing
8.1 Overview
225 8.2 Data requirements
8.3 Processing phases
229 8.4 Error checking
9. Simulation semantics
9.1 Supply network creation
231 9.2 Supply network simulation
232 9.3 Power state simulation
235 9.4 Power state transition detection
236 9.5 Simstate simulation
238 9.6 Transitioning from one simstate state to another
239 9.7 Simulation of retention
245 9.8 Simulation of isolation
246 9.9 Simulation of level-shifting
9.10 Simulation of repeaters
10. UPF information model
10.1 Overview
247 10.2 Components of UPF information model
248 10.3 Identifiers in information model (IDs)
251 10.4 Classification of objects
257 10.5 Example of design hierarchy
258 10.6 Object definitions
317 11. Information model application programmable interface (API)
11.1 Tcl interface
327 11.2 HDL interface
391 Annex A (informative) Bibliography
392 Annex B (normative) Value conversion tables
B.1 Overview
B.2 VHDL_SL2UPF
B.3 UPF2VHDL_SL
B.4 VHDL_SL2UPF_GNDZERO
393 B.5 UPF_GNDZERO2VHDL_SL
B.6 SV_LOGIC2UPF
B.7 UPF2SV_LOGIC
B.8 SV_LOGIC2UPF_GNDZERO
B.9 UPF_GNDZERO2SV_LOGIC
394 B.10 VHDL_TIED_HI
B.11 SV_TIED_HI
B.12 VHDL_TIED_LO
B.13 SV_TIED_LO
395 Annex C (informative) UPF query examples
C.1 Overview
C.2 Utility procs
396 C.3 High-level procs
398 C.4 Superseded UPF queries
400 Annex D (informative) Replacing deprecated and legacy commands and options
D.1 Overview
D.2 Deprecated and legacy constructs
402 D.3 Recommendations for replacing deprecated and legacy constructs
405 Annex E (informative) Low-power design methodology
E.1 Overview
E.2 Simple System on Chip (SoC) example design
408 E.3 Design, verification, and implementation flow
411 E.4 Power intent of the example design
432 Annex F (informative) Power-management cell definitions in UPF and Liberty
F.1 Introduction
F.2 define_always_on_cell
434 F.3 define_diode_clamp
435 F.4 define_isolation_cell
438 F.5 define_level_shifter_cell
440 F.6 define_power_switch_cell
442 F.7 define_retention_cell
446 Annex G (informative) Power-management cell modeling examples
G.1 Overview
G.2 Modeling always-on cells
452 G.3 Modeling cells with internal diodes
454 G.4 Modeling isolation cells
471 G.5 Modeling level-shifters
488 G.6 Modeling power-switch cells
498 G.7 Modeling state retention cells
510 Annex H (informative) IP power modeling for system-level design
H.1 Introduction
H.2 Overview of system-level IP power models
511 H.3 Content of system-level IP power models
512 H.4 Power calculation using power functions
514 H.5 Power model structure
515 H.6 Power model instantiation—example approach
517 Annex I (normative) Switching Activity Interchange Format
518 I.1 Syntactic conventions
519 I.2 Lexical conventions
522 I.3 Backward SAIF file
538 I.4 Library forward SAIF file
546 I.5 RTL forward SAIF file

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