IEC 63011-3:2018
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Integrated circuits – Three dimensional integrated circuits – Part 3: Model and measurement conditions of through-silicon via
| Published By | Publication Date | Number of Pages |
| IEC | 2018-11-28 | 32 |
IEC 63011-3:2018 specifies a reference model of through-silicon via (TSV) electrical characteristics required for an interface design in three dimensional integrated circuit (3-D IC) to transmit and receive digital data and measurement conditions for resistance and capacitance to specify TSV characteristics in 3-D IC.
Power devices, RF devices and micro-electromechanical systems (MEMS) are not in the scope of this document.
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BS IEC 63011-3:2018:2019 Edition
Integrated circuits. Three dimensional integrated circuits – Model and measurement conditions of through-silicon via Published…
