{"id":234324,"date":"2024-10-19T15:16:57","date_gmt":"2024-10-19T15:16:57","guid":{"rendered":"https:\/\/pdfstandards.shop\/product\/uncategorized\/bs-en-iec-60749-262018-tc\/"},"modified":"2024-10-25T09:49:46","modified_gmt":"2024-10-25T09:49:46","slug":"bs-en-iec-60749-262018-tc","status":"publish","type":"product","link":"https:\/\/pdfstandards.shop\/product\/publishers\/bsi\/bs-en-iec-60749-262018-tc\/","title":{"rendered":"BS EN IEC 60749-26:2018 – TC"},"content":{"rendered":"

PDF Catalog<\/h4>\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n
PDF Pages<\/th>\nPDF Title<\/th>\n<\/tr>\n
70<\/td>\nNational foreword <\/td>\n<\/tr>\n
73<\/td>\nEnglish
CONTENTS <\/td>\n<\/tr>\n
76<\/td>\nFOREWORD <\/td>\n<\/tr>\n
78<\/td>\n1 Scope
2 Normative references
3 Terms and definitions <\/td>\n<\/tr>\n
81<\/td>\n4 Apparatus and required equipment
4.1 Waveform verification equipment <\/td>\n<\/tr>\n
82<\/td>\n4.2 Oscilloscope
4.3 Additional requirements for digital oscilloscopes
4.4 Current transducer (inductive current probe)
4.5 Evaluation loads <\/td>\n<\/tr>\n
83<\/td>\n4.6 Human body model simulator
4.7 HBM test equipment parasitic properties
5 Stress test equipment qualification and routine verification
5.1 Overview of required HBM tester evaluations
Figures
Figure 1 \u2013 Simplified HBM simulator circuit with loads <\/td>\n<\/tr>\n
84<\/td>\n5.2 Measurement procedures
5.2.1 Reference pin pair determination
5.2.2 Waveform capture with current probe <\/td>\n<\/tr>\n
85<\/td>\n5.2.3 Determination of waveform parameters <\/td>\n<\/tr>\n
86<\/td>\nFigure 2 \u2013 Current waveform through shorting wires <\/td>\n<\/tr>\n
87<\/td>\nFigure 3 \u2013 Current waveform through a 500 \u2126 resistor <\/td>\n<\/tr>\n
88<\/td>\n5.2.4 High voltage discharge path test
5.3 HBM tester qualification
5.3.1 HBM ESD tester qualification requirements
5.3.2 HBM tester qualification procedure
Figure 4 \u2013 Peak current short circuit ringing waveform <\/td>\n<\/tr>\n
89<\/td>\n5.4 Test fixture board qualification for socketed testers <\/td>\n<\/tr>\n
90<\/td>\n5.5 Routine waveform check requirements
5.5.1 Standard routine waveform check description
5.5.2 Waveform check frequency
Tables
Table 1 \u2013 Waveform specification <\/td>\n<\/tr>\n
91<\/td>\n5.5.3 Alternate routine waveform capture procedure
5.6 High voltage discharge path check
5.6.1 Relay testers
5.6.2 Non-relay testers
5.7 Tester waveform records
5.7.1 Tester and test fixture board qualification records
5.7.2 Periodic waveform check records <\/td>\n<\/tr>\n
92<\/td>\n5.8 Safety
5.8.1 Initial set-up
5.8.2 Training
5.8.3 Personnel safety
6 Classification procedure
6.1 Devices for classification
6.2 Parametric and functional testing
6.3 Device stressing <\/td>\n<\/tr>\n
93<\/td>\n6.4 Pin categorization
6.4.1 General
6.4.2 No connect pins <\/td>\n<\/tr>\n
94<\/td>\n6.4.3 Supply pins
6.4.4 Non-supply pins <\/td>\n<\/tr>\n
95<\/td>\n6.5 Pin groupings
6.5.1 Supply pin groups
6.5.2 Shorted non-supply pin groups
6.6 Pin stress combinations
6.6.1 Pin stress combination categorization <\/td>\n<\/tr>\n
96<\/td>\nTable 2 \u2013 Preferred pin combinations sets <\/td>\n<\/tr>\n
97<\/td>\n6.6.2 Non-supply and supply to supply combinations (1, 2, \u2026 N)
Table 3 \u2013 Alternative pin combinations sets <\/td>\n<\/tr>\n
98<\/td>\n6.6.3 Non-supply to non-supply combinations <\/td>\n<\/tr>\n
99<\/td>\n6.7 HBM stressing with a low-parasitic simulator
6.7.1 Low-parasitic HBM simulator
6.7.2 Requirements for low parasitics
6.8 Testing after stressing
7 Failure criteria
8 Component classification <\/td>\n<\/tr>\n
100<\/td>\nTable 4 \u2013 HBM ESD component classification levels <\/td>\n<\/tr>\n
101<\/td>\nAnnex\u00a0A (informative)HBM test method flow chart
Figure A.1 \u2013 HBM test method flow chart (1 of 3) <\/td>\n<\/tr>\n
104<\/td>\nAnnex\u00a0B (informative)HBM test equipment parasitic properties
B.1 Optional trailing pulse detection equipment \/ apparatus
Figure B.1 \u2013 Diagram of trailing pulse measurement setup <\/td>\n<\/tr>\n
105<\/td>\nB.2 Optional pre-pulse voltage rise test equipment
Figure B.2 \u2013 Positive stress at 4 000 V
Figure B.3 \u2013 Negative stress at 4 000\u00a0V <\/td>\n<\/tr>\n
106<\/td>\nFigure B.4 \u2013 Illustration of measuring voltage before HBM pulsewith a Zener diode or a device
Figure B.5 \u2013 Example of voltage rise before the HBM current pulseacross a 9,4\u00a0V Zener diode <\/td>\n<\/tr>\n
107<\/td>\nB.3 Open-relay tester capacitance parasitics
B.4 Test to determine if an HBM simulator is a low-parasitic simulator <\/td>\n<\/tr>\n
108<\/td>\nFigure B.6 \u2013 Diagram of a 10-pin shorting test device showing current probe <\/td>\n<\/tr>\n
109<\/td>\nAnnex\u00a0C (informative)Example of testing a product using Table\u00a02, Table\u00a03,or Table\u00a02 with a two-pin HBM tester
C.1 General
Figure C.1 \u2013 Example to demonstrate the idea of the partitioned test <\/td>\n<\/tr>\n
110<\/td>\nC.2 Procedure A (following Table 2): <\/td>\n<\/tr>\n
111<\/td>\nC.3 Alternative procedure B (following Table\u00a03):
Table C.1 \u2013 Product testing in accordance with Table 2 <\/td>\n<\/tr>\n
112<\/td>\nC.4 Alternative procedure C (following Table 2):
Table C.2 \u2013 Product testing in accordance with Table\u00a03 <\/td>\n<\/tr>\n
113<\/td>\nTable C.3 \u2013 Alternative product testing in accordance with Table 2 <\/td>\n<\/tr>\n
114<\/td>\nAnnex\u00a0D (informative)Examples of coupled non-supply pin pairs <\/td>\n<\/tr>\n
115<\/td>\nAnnex\u00a0E (normative)Cloned non-supply (I\/O) pin sampling test method
E.1 Purpose and overview
E.2 Pin sampling overview and statistical details <\/td>\n<\/tr>\n
116<\/td>\nE.3 IC product selections
Figure E.1 \u2013 SPL, V1, VM, and z with the Bell shapedistribution pin failure curve <\/td>\n<\/tr>\n
117<\/td>\nE.4 Randomly selecting and testing cloned I\/O pins
E.5 Determining if sampling can be used with the supplied Excel spreadsheet
E.5.1 Using the supplied Excel spreadsheet
E.5.2 Without using the Excel spreadsheet
E.6 HBM testing with a sample of cloned I\/O pins <\/td>\n<\/tr>\n
118<\/td>\nE.7 Examples of testing with sampled cloned I\/Os <\/td>\n<\/tr>\n
120<\/td>\nFigure E.2 \u2013 I\/O sampling test method flow chart <\/td>\n<\/tr>\n
121<\/td>\nBibliography <\/td>\n<\/tr>\n<\/table>\n","protected":false},"excerpt":{"rendered":"

Tracked Changes. Semiconductor devices. Mechanical and climatic test methods – Electrostatic discharge (ESD) sensitivity testing. Human body model (HBM)<\/b><\/p>\n\n\n\n\n
Published By<\/td>\nPublication Date<\/td>\nNumber of Pages<\/td>\n<\/tr>\n
BSI<\/b><\/a><\/td>\n2020<\/td>\n124<\/td>\n<\/tr>\n<\/tbody>\n<\/table>\n","protected":false},"featured_media":234328,"template":"","meta":{"rank_math_lock_modified_date":false,"ep_exclude_from_search":false},"product_cat":[573,2641],"product_tag":[],"class_list":{"0":"post-234324","1":"product","2":"type-product","3":"status-publish","4":"has-post-thumbnail","6":"product_cat-31-080-01","7":"product_cat-bsi","9":"first","10":"instock","11":"sold-individually","12":"shipping-taxable","13":"purchasable","14":"product-type-simple"},"_links":{"self":[{"href":"https:\/\/pdfstandards.shop\/wp-json\/wp\/v2\/product\/234324","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/pdfstandards.shop\/wp-json\/wp\/v2\/product"}],"about":[{"href":"https:\/\/pdfstandards.shop\/wp-json\/wp\/v2\/types\/product"}],"wp:featuredmedia":[{"embeddable":true,"href":"https:\/\/pdfstandards.shop\/wp-json\/wp\/v2\/media\/234328"}],"wp:attachment":[{"href":"https:\/\/pdfstandards.shop\/wp-json\/wp\/v2\/media?parent=234324"}],"wp:term":[{"taxonomy":"product_cat","embeddable":true,"href":"https:\/\/pdfstandards.shop\/wp-json\/wp\/v2\/product_cat?post=234324"},{"taxonomy":"product_tag","embeddable":true,"href":"https:\/\/pdfstandards.shop\/wp-json\/wp\/v2\/product_tag?post=234324"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}