{"id":421230,"date":"2024-10-20T06:35:04","date_gmt":"2024-10-20T06:35:04","guid":{"rendered":"https:\/\/pdfstandards.shop\/product\/uncategorized\/bs-iec-630552016-2\/"},"modified":"2024-10-26T12:19:33","modified_gmt":"2024-10-26T12:19:33","slug":"bs-iec-630552016-2","status":"publish","type":"product","link":"https:\/\/pdfstandards.shop\/product\/publishers\/bsi\/bs-iec-630552016-2\/","title":{"rendered":"BS IEC 63055:2016"},"content":{"rendered":"

This standard defines a common interoperable format that will be used for the design of a) large-scale integration (LSI), b) packages for such LSI, and c) printed circuit boards on which the packaged LSI are interconnected. Collectively, such designs are referred to as\u201d LSI-Package-Board\u201d (LPB) designs. The format provides a common way to specify information\/data about the project management, netlists, components, design rules, and geometries used in LPB designs.<\/p>\n

PDF Catalog<\/h4>\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n
PDF Pages<\/th>\nPDF Title<\/th>\n<\/tr>\n
4<\/td>\nContents <\/td>\n<\/tr>\n
8<\/td>\nTitle page <\/td>\n<\/tr>\n
10<\/td>\nIntroduction <\/td>\n<\/tr>\n
12<\/td>\nImportant Notice
1. Overview
1.1 Scope
1.2 Purpose
1.3 Key characteristics of the LSI-Package-Board Format <\/td>\n<\/tr>\n
14<\/td>\n1.4 Contents of this standard
2. Normative references
3. Definitions, acronyms, and abbreviations
3.1 Definitions <\/td>\n<\/tr>\n
17<\/td>\n3.2 Acronyms and abbreviations <\/td>\n<\/tr>\n
19<\/td>\n4. Concept of the LPB Format
4.1 Technical background
4.2 Conventional design
4.3 Common problems at the design site <\/td>\n<\/tr>\n
20<\/td>\n4.4 Concept of LPB interoperable design
4.5 Value creation by LPB interoperable design <\/td>\n<\/tr>\n
21<\/td>\n4.6 LPB Format <\/td>\n<\/tr>\n
22<\/td>\n4.7 Summary of LPB Format files <\/td>\n<\/tr>\n
27<\/td>\n5. Language basics
5.1 General <\/td>\n<\/tr>\n
28<\/td>\n5.2 Typographic and syntax conventions
6. Common elements in M-Format, C-Format, and R-Format
6.1 General <\/td>\n<\/tr>\n
29<\/td>\n6.2 The <\/p>\n
element <\/td>\n<\/tr>\n
30<\/td>\n6.3 The element <\/td>\n<\/tr>\n
42<\/td>\n7. M-Format
7.1 M-Format file structure
7.2 The element <\/td>\n<\/tr>\n
43<\/td>\n7.3 The element <\/td>\n<\/tr>\n
47<\/td>\n8. C-Format
8.1 C-Format file structure <\/td>\n<\/tr>\n
48<\/td>\n8.2 The element <\/td>\n<\/tr>\n
93<\/td>\n8.3 The element <\/td>\n<\/tr>\n
97<\/td>\n9. R-Format
9.1 R-Format file structure
9.2 The element <\/td>\n<\/tr>\n
127<\/td>\n9.3 The element <\/td>\n<\/tr>\n
133<\/td>\n10. N-Format
10.1 Purpose of the N-Format file
10.2 How to identify the power\/ground network
10.3 Example
11. G-Format
11.1 Language basics of G-Format <\/td>\n<\/tr>\n
134<\/td>\n11.2 Structure <\/td>\n<\/tr>\n
135<\/td>\n11.3 Header section <\/td>\n<\/tr>\n
136<\/td>\n11.4 Material section <\/td>\n<\/tr>\n
137<\/td>\n11.5 Layer section
11.6 Shape section <\/td>\n<\/tr>\n
142<\/td>\n11.7 Board geometry section <\/td>\n<\/tr>\n
144<\/td>\n11.8 Padstack section <\/td>\n<\/tr>\n
145<\/td>\n11.9 Part section <\/td>\n<\/tr>\n
146<\/td>\n11.10 Component section <\/td>\n<\/tr>\n
147<\/td>\n11.11 Net attribute section
11.12 Netlist section <\/td>\n<\/tr>\n
149<\/td>\n11.13 Via section <\/td>\n<\/tr>\n
150<\/td>\n11.14 Bondwire section <\/td>\n<\/tr>\n
152<\/td>\n11.15 Route section <\/td>\n<\/tr>\n
156<\/td>\nAnnex A (informative) Bibliography <\/td>\n<\/tr>\n
157<\/td>\nAnnex B (informative) Examples of utilization
B.1 Understanding the function of the LPB Format
B.2 Test bench <\/td>\n<\/tr>\n
159<\/td>\nB.3 Design flow example <\/td>\n<\/tr>\n
190<\/td>\nB.4 Growth of the sample files in the LPB Format <\/td>\n<\/tr>\n
193<\/td>\nB.5 Simulations using the sample files in the LPB Format <\/td>\n<\/tr>\n
195<\/td>\nAnnex C (informative) XML Encryption <\/td>\n<\/tr>\n
198<\/td>\nAnnex D (informative) MD5 checksum <\/td>\n<\/tr>\n
199<\/td>\nAnnex E (informative) Chip-Package Interface Protocol
E.1 General
E.2 Comparison of C-Format with Chip-Package Interface Protocol <\/td>\n<\/tr>\n<\/table>\n","protected":false},"excerpt":{"rendered":"

Format for LSI-Package-Board interoperable design<\/b><\/p>\n\n\n\n\n
Published By<\/td>\nPublication Date<\/td>\nNumber of Pages<\/td>\n<\/tr>\n
BSI<\/b><\/a><\/td>\n2016<\/td>\n208<\/td>\n<\/tr>\n<\/tbody>\n<\/table>\n","protected":false},"featured_media":421239,"template":"","meta":{"rank_math_lock_modified_date":false,"ep_exclude_from_search":false},"product_cat":[2641],"product_tag":[],"class_list":{"0":"post-421230","1":"product","2":"type-product","3":"status-publish","4":"has-post-thumbnail","6":"product_cat-bsi","8":"first","9":"instock","10":"sold-individually","11":"shipping-taxable","12":"purchasable","13":"product-type-simple"},"_links":{"self":[{"href":"https:\/\/pdfstandards.shop\/wp-json\/wp\/v2\/product\/421230","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/pdfstandards.shop\/wp-json\/wp\/v2\/product"}],"about":[{"href":"https:\/\/pdfstandards.shop\/wp-json\/wp\/v2\/types\/product"}],"wp:featuredmedia":[{"embeddable":true,"href":"https:\/\/pdfstandards.shop\/wp-json\/wp\/v2\/media\/421239"}],"wp:attachment":[{"href":"https:\/\/pdfstandards.shop\/wp-json\/wp\/v2\/media?parent=421230"}],"wp:term":[{"taxonomy":"product_cat","embeddable":true,"href":"https:\/\/pdfstandards.shop\/wp-json\/wp\/v2\/product_cat?post=421230"},{"taxonomy":"product_tag","embeddable":true,"href":"https:\/\/pdfstandards.shop\/wp-json\/wp\/v2\/product_tag?post=421230"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}