| PDF Pages<\/th>\n | PDF Title<\/th>\n<\/tr>\n | ||||||
|---|---|---|---|---|---|---|---|
| 1<\/td>\n | BRITISH STANDARD <\/td>\n<\/tr>\n | ||||||
| 2<\/td>\n | National foreword <\/td>\n<\/tr>\n | ||||||
| 4<\/td>\n | Foreword Foreword to amendment A1 Foreword to amendment A2 <\/td>\n<\/tr>\n | ||||||
| 5<\/td>\n | Contents <\/td>\n<\/tr>\n | ||||||
| 9<\/td>\n | 1.1 Scope 1.2 Normative references <\/td>\n<\/tr>\n | ||||||
| 11<\/td>\n | 1.3 Order of precedence 2 Terminology and general requirements 2.1 General 2.2 Definitions <\/td>\n<\/tr>\n | ||||||
| 14<\/td>\n | Figure 1 Example of the use of frequency offset <\/td>\n<\/tr>\n | ||||||
| 17<\/td>\n | Figure 2 Typical frequency fluctuation characteristics <\/td>\n<\/tr>\n | ||||||
| 18<\/td>\n | Figure 3 Characteristics of an output waveform <\/td>\n<\/tr>\n | ||||||
| 19<\/td>\n | Figure 49 Clock signal with phase jitter <\/td>\n<\/tr>\n | ||||||
| 20<\/td>\n | Figure 50 Phase jitter measures Figure 51 Gaussian distribution of jitter <\/td>\n<\/tr>\n | ||||||
| 21<\/td>\n | Figure 52 Jitter amplitude and period of jitter frequency Figure 53 Jitter tolerance according to ITU-T G.825, ANSI T1.105.03, Telcordia GR-253 and ETSI EN 300462 <\/td>\n<\/tr>\n | ||||||
| 22<\/td>\n | 2.3 Preferred values for ratings and characteristics <\/td>\n<\/tr>\n | ||||||
| 23<\/td>\n | 2.4 Marking 3 Quality assessment procedures 3.1 Primary stage of manufacture 3.2 Structurally similar components <\/td>\n<\/tr>\n | ||||||
| 24<\/td>\n | 3.3 Subcontracting 3.4 Incorporated components 3.5 Manufacturer\u2019s approval 3.6 Approval procedures <\/td>\n<\/tr>\n | ||||||
| 25<\/td>\n | 3.7 Procedures for capability approval 3.8 Procedures for qualification approval 3.9 Test procedures 3.10 Screening requirements 3.11 Rework and repair work <\/td>\n<\/tr>\n | ||||||
| 26<\/td>\n | 3.12 Certified test records 3.13 Validity of release 3.14 Release for delivery 3.15 Unchecked parameters 4 Test and measurement procedures 4.1 General 4.2 Test and measurement conditions <\/td>\n<\/tr>\n | ||||||
| 27<\/td>\n | 4.3 Visual inspection <\/td>\n<\/tr>\n | ||||||
| 28<\/td>\n | 4.4 Dimensions and gauging procedures 4.5 Electrical test procedures Figure 4 Test circuits for insulation resistance measurements <\/td>\n<\/tr>\n | ||||||
| 29<\/td>\n | Figure 5 Test circuit for voltage proof test <\/td>\n<\/tr>\n | ||||||
| 30<\/td>\n | Figure 6 Test circuit for oscillator input power measurement Figure 7 Test circuit for oven and oscillator input power measurement <\/td>\n<\/tr>\n | ||||||
| 31<\/td>\n | Figure 8 Test circuit for measurement of output frequency, method 1 <\/td>\n<\/tr>\n | ||||||
| 32<\/td>\n | Figure 9 Test circuit for measurement of output frequency, method 2 <\/td>\n<\/tr>\n | ||||||
| 33<\/td>\n | Figure 10 Test circuit for measurement of frequency\/temperature characteristics <\/td>\n<\/tr>\n | ||||||
| 34<\/td>\n | Figure 11 Thermal transient behaviour of typical oscillator <\/td>\n<\/tr>\n | ||||||
| 36<\/td>\n | Figure 12 Generalized oscillator circuit Figure 13 Test circuit for start-up behaviour and start-up time measurement <\/td>\n<\/tr>\n | ||||||
| 37<\/td>\n | Figure 14 Typical start-up behaviour with slow supply voltage ramp <\/td>\n<\/tr>\n | ||||||
| 38<\/td>\n | Figure 15 Definition of start-up time Figure 16 Supply voltage waveform for periodical <\/td>\n<\/tr>\n | ||||||
| 39<\/td>\n | Figure 17 Typical oscillator stabilization characteristic <\/td>\n<\/tr>\n | ||||||
| 40<\/td>\n | Figure 18 Example of retrace characteristic Figure 19 Test circuit for the measurement of output voltage <\/td>\n<\/tr>\n | ||||||
| 41<\/td>\n | Figure 20 Test circuit for the measurement of pulse outputs Figure 21 Test circuit for harmonic distortion measurement <\/td>\n<\/tr>\n | ||||||
| 42<\/td>\n | Figure 22 Quasi-sinusoidal output waveforms <\/td>\n<\/tr>\n | ||||||
| 43<\/td>\n | Figure 23 Frequency spectrum for harmonic distortion <\/td>\n<\/tr>\n | ||||||
| 45<\/td>\n | Figure 24 Test circuit for the determination of isolation between output ports <\/td>\n<\/tr>\n | ||||||
| 46<\/td>\n | Figure 25 Test circuit for measuring suppression of gated oscillators Figure 26 Test circuit for tri-state disable mode output current <\/td>\n<\/tr>\n | ||||||
| 47<\/td>\n | Figure 27 Test circuit for output gating time \u2014 tri-state <\/td>\n<\/tr>\n | ||||||
| 48<\/td>\n | Figure 28 Test circuit for modulation index measurement Figure 29 Modulation waveform for index calculation <\/td>\n<\/tr>\n | ||||||
| 49<\/td>\n | Figure 30 Logarithmic signal amplitude scale <\/td>\n<\/tr>\n | ||||||
| 50<\/td>\n | Figure 31 Test circuit to determine amplitude modulation sensitivity Figure 32 Frequency spectrum of amplitude modulation distortion <\/td>\n<\/tr>\n | ||||||
| 51<\/td>\n | Figure 33 Test circuit to determine pulse amplitude modulation <\/td>\n<\/tr>\n | ||||||
| 52<\/td>\n | Figure 34 Pulse modulation characteristic <\/td>\n<\/tr>\n | ||||||
| 53<\/td>\n | Figure 35 Test circuit for the determination of modulation input impedance <\/td>\n<\/tr>\n | ||||||
| 54<\/td>\n | Figure 36 Test circuit for the measurement of f.m. deviation <\/td>\n<\/tr>\n | ||||||
| 55<\/td>\n | Figure 37 Test circuit for the measurement of f.m. sensitivity <\/td>\n<\/tr>\n | ||||||
| 56<\/td>\n | Figure 38 Test circuit for the measurement of frequency modulation distortion <\/td>\n<\/tr>\n | ||||||
| 57<\/td>\n | Figure 39 Test circuit for the measurement of single-sideband phase noise <\/td>\n<\/tr>\n | ||||||
| 59<\/td>\n | Figure 40 Typical noise pedestal spectrum <\/td>\n<\/tr>\n | ||||||
| 61<\/td>\n | Figure 41 Test circuit for the measurement of incidental frequency modulation <\/td>\n<\/tr>\n | ||||||
| 62<\/td>\n | Figure 42 Test circuit for method 1 <\/td>\n<\/tr>\n | ||||||
| 63<\/td>\n | Figure 43 Test circuit for method 2 <\/td>\n<\/tr>\n | ||||||
| 64<\/td>\n | Figure 44 Circuit modifications for methods 1 and 2 Figure 45 Time-domain short-term frequency stability of a typical\ufffd5\ufffdMHz precision oscillator <\/td>\n<\/tr>\n | ||||||
| 67<\/td>\n | Figure 47 Characteristics of line impedance of stabilizing network Figure 48 Circuit diagram of line impedance of stabilizing network <\/td>\n<\/tr>\n | ||||||
| 68<\/td>\n | Table 1 Measuring sets bandwidths <\/td>\n<\/tr>\n | ||||||
| 69<\/td>\n | Figure 54 Phase jitter measurement with sampling oscilloscope <\/td>\n<\/tr>\n | ||||||
| 70<\/td>\n | Table 6 Fourier frequency range for phase noise test <\/td>\n<\/tr>\n | ||||||
| 71<\/td>\n | Figure 55 Block diagram of a jitter and wander analyser according to ITU-T 0.172 Table 7 Standard bit rates for various applications 4.6 Mechanical and environmental test procedures <\/td>\n<\/tr>\n | ||||||
| 72<\/td>\n | Table 2 Tensile force Table 3 Thrust force Table 4 Bending force <\/td>\n<\/tr>\n | ||||||
| 73<\/td>\n | Table 5 Torque force <\/td>\n<\/tr>\n | ||||||
| 76<\/td>\n | 4.7 Endurance test procedure <\/td>\n<\/tr>\n | ||||||
| 78<\/td>\n | Annex A (normative) Load circuit for logic drive A.1 TTL and Schottky Figure A.1 Circuit for TTL Figure A.2 Circuit for Schottky logic <\/td>\n<\/tr>\n | ||||||
| 79<\/td>\n | Table A.1 Values to be used when calculating A.2 CMOS A.3 ECL <\/td>\n<\/tr>\n | ||||||
| 80<\/td>\n | Annex B (informative) Latch-up test B.1 Definition B.1.1 Latch-up B.1.2 Test procedure B.2 Test method B.2.1 This test is destructive. B.2.2 This test is applicable only to quartz crystal controlled oscillators containing CMOS integrated … B.2.3 This test shall be performed in accordance with IEC 60748-2. B.2.4 This test is a recommended test procedure. It is not a specification. No test limits are given. B.2.5 This test is performed for characterization and inspection purposes only. It is not a production … <\/td>\n<\/tr>\n | ||||||
| 81<\/td>\n | Annex C (normative) Electrostatic discharge sensitivity classification C.1 Definition C.1.1 Electrostatic discharge (ESD) C.1.2 Test procedure C.2 Test methods <\/td>\n<\/tr>\n | ||||||
| 82<\/td>\n | Annex ZA (normative) Normative references to international publications with their corresponding European … <\/td>\n<\/tr>\n | ||||||
| 85<\/td>\n | Bibliography <\/td>\n<\/tr>\n<\/table>\n","protected":false},"excerpt":{"rendered":" Quartz crystal controlled oscillators of assessed quality – Generic specification<\/b><\/p>\n |